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  1. general description the HEF4952B is a dual 3-channel analog mu ltiplexer/demult iplexer with supplementary switches and common select lo gic. each switch features three independent inputs/outputs (pins ny0, ny1 and ny2) an input/output ny3 that can be connected to ny2 or v ss and an input/output (nz) common to ny0, ny1 and ny2. three digital select inputs (s1, s2 and s3) are common to both switches. inputs incl ude clamp diodes, this enables the use of current limiting resistors to inte rface inputs in excess of v dd . v ss and v dd are the digital control supply pins. the HEF4952B is suitable for use over the full industrial ( ? 40 c to +85 c) temperature range. 2. features ? fully static operation ? 5 v, 10 v, and 15 v parametric ratings ? schmitt-trigger action at control inputs ? small signal switch ? standardized symmetrical output characteristics ? operates across the full industrial temperature range ? 40 c to +85 c ? complies with jedec standard jesd 13-b 3. applications ? industrial ? analog multiplexing and demultiplexing ? digital multiplexing and demultiplexing ? signal gating 4. ordering information HEF4952B dual 3-channel analog mult iplexer/demultiplexer with supplementary switches rev. 03 ? 16 december 2009 product data sheet table 1. ordering information all types operate from ? 40 c to +85 c. type number package name description version HEF4952Bt so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 2 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 5. functional diagram fig 1. functional diagram 001aad872 logic level converter v dd 3-to-5 decoder 7 s1 9 s2 10 s3 16 1y0 15 1z 14 1y1 12 1y2 11 1y3 v ee v ss v ss 1 2y0 2 2z 3 2y1 5 2y2 6 2y3 v ss
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 3 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer fig 2. logic diagram v ss v ss 1y0 1z 1sy0 1y2 1sy2 1y3 1sy3 1sy4 1y1 s2 s1 s3 1sy1 2y0 2z 2sy0 2y2 2sy2 2y3 001aad8 73 2sy3 2sy4 2y1 2sy1 logic level converter
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 4 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 6. pinning information 6.1 pinning 6.2 pin description fig 3. pin configuration HEF4952B 2y0 1y0 2z 1z 2y1 1y1 v ee v dd 2y2 1y2 2y3 1y3 s1 s3 v ss s2 001aad871 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 2. pin description symbol pin description v ee 4 supply voltage v ss 8 ground supply voltage s1, s2, s3 7, 9, 10 select input 1y0, 1y1, 1y2, 1y3, 2y0, 2y1, 2y2, 2y3 16, 14 , 12, 11, 1, 3, 5, 6 independent input or output 1z, 2z 15, 2 common output or input v dd 13 supply voltage
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 5 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 7. functional description 7.1 function table [1] h = high voltage level; l = low voltage level. 8. limiting values [1] to avoid drawing v dd current out of terminal z, when switch current flows in to terminals y, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current flows into terminal z, no v dd current will flow out of terminals y, and in this case there is no limit for the voltage drop across the switch, but the voltages at y and z may not exceed v dd or v ee . [2] for so16 package: p tot derates linearly wi th 8 mw/k above 70 c. table 3. function table input switch s3 s2 s1 nsy0 nsy1 nsy2 nsy3 nsy4 l l l open ny1 to nz open open ny3 to v ss l l h ny0 to nz open open open ny3 to v ss l h l open open ny2 to nz open ny3 to v ss l h h ny0 to nz open ny2 to nz open ny3 to v ss h l l open ny1 to nz open ny2 to ny3 open h l h ny0 to nz open open ny2 to ny3 open h h l open open ny2 to nz ny2 to ny3 open h h h open open open ny2 to ny3 open table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to v ss = 0 v (ground). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +18 v v ee supply voltage referenced to v dd [1] ? 18 +0.5 v i ik input clamping current pins sn; v i < ? 0.5 v or v i >v dd +0.5v - 10 ma v i input voltage ? 0.5 v dd + 0.5 v i i/o input/output current - 10 ma i dd supply current - 50 ma t stg storage temperature ? 65 +150 c t amb ambient temperature ? 40 +85 c p tot total power dissipation t amb = ? 40 c to +85 c [2] - 500 mw p power dissipation per output - 100 mw
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 6 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 9. recommended operating conditions 10. static characteristics table 5. recommended operating conditions symbol parameter conditions min typ max unit v dd supply voltage see figure 4 5- 15v v ee supply voltage see figure 4 -15 - 0 v v i input voltage 0 - v dd v t amb ambient temperature in free air ? 40 - +85 c fig 4. operating area as a function of the supply voltages v dd ? v ee (v) 015 10 5 001aad874 5 10 15 v dd ? v ss (v) 0 operating area table 6. static characteristics v ss = v ee = 0 v; v i = v ss or v dd unless otherwise specified. symbol parameter conditions v dd t amb = ? 40 c t amb = 25 c t amb = 85 c unit min max min max min max i i input leakage current 15 v - 0.3 - 0.3 - 1.0 a i s(off) off-state leakage current y port; per channel; see figure 5 15 v - - - 200 - - na i dd supply current i o = 0 a 5 v - 20 - 20 - 150 a 10 v - 40 - 40 - 300 a 15 v - 80 - 80 - 600 a c i input capacitance sn inputs - - - - 7.5 - - pf
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 7 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 10.1 test circuits 10.2 on resistance 10.2.1 on resistance waveform and test circuit fig 5. test circuit for measuring off-state leakage current nyn port i s 001aak653 v o switch v ss = v ee s1 to s3 nz y0 v dd or v ss v dd nyn 1 2 v i table 7. on resistance t amb = 25 c; i sw =200 a; v ss = v ee = 0 v. symbol parameter conditions v dd ? v ee typ max unit r on on resistance v i = 0 v; see figure 6 and figure 7 10 v 45 150 v i = 2.5 v; see figure 6 and figure 7 10 v 65 365 v i = 5.0 v; see figure 6 and figure 7 10 v 110 360 r on on resistance mismatch between channels v i = 2.5 v; see figure 6 10 v 10 - r on =v sw /i sw . fig 6. test circuit for measuring r on v 001aak65 4 v i v sw i sw v ss = v ee s1 to s3 nz v dd or v ss v dd nyn
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 8 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 11. dynamic characteristics fig 7. typical r on as a function of input voltage v i (v) 06 4 2 001aad876 40 80 120 r on ( ) 0 v dd = 10 v table 8. dynamic characteristics t amb = 25 c; v ss = v ee = 0 v; for test circuit see figure 10 . symbol parameter conditions v dd typ max unit t phl high to low propagation delay nyn, nz to nz, nyn; v i = 1.0 v; see figure 8 5 v 5 - ns 10 v36ns 15 v 2 - ns t plh low to high propagation delay nyn, nz to nz, nyn; v i = 1.0 v; see figure 8 5 v 5 - ns 10 v36ns 15 v 2 - ns t pzl off-state to low propagation delay sn to nyn, nz; v i =v ee ;see figure 9 5 v 125 - ns 10 v 50 100 ns 15 v 35 - ns t pzh off-state to high propagation delay sn to nyn, nz; v i = 1.0 v; see figure 9 5 v 125 - ns 10 v 50 100 ns 15 v 35 - ns
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 9 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 11.1 waveforms and test circuit measurement points are given in table 9 . fig 8. nyn, nz to nz, nyn propagation delays 001aak65 5 nyn or nz input nz or nyn output t plh t phl v i v ee v m v m v o v ee measurement points are given in table 9 . fig 9. enable and disable times 001aak6 56 switch off switch on switch on nyn or nz output low-to-off off-to-low nyn or nz output high-to-off off-to-high sn input v o v o v ee v ee v dd v ss v m t pzl t pzh 90 % 90 % 10 % 10 % table 9. measurement points supply voltage input output v dd v m v m 5 v to 15 v 0.5v dd 0.5v dd
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 10 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer test data is given in table 10 . definitions: dut = device under test. r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including test jig and probe. r l = load resistance. fig 10. test circuit for measuring switching times 001aak78 0 v i v o r t c l r l s1 dut pulse generator t w v m v i v i v dd 1.0 v v ss v ee open 0 v negative pulse v i 0 v positive pulse 10 % 90 % 90 % 10 % v m v m v m t w t f t f t r t r table 10. test data input load s1 position nyn, nz sn t r , t f v m c l r l t phl , t plh t pzh t pzl other v i or v ee v dd or v ss 20 ns 0.5v dd 50 pf 10 k v ee v ee 1.0 v v ee table 11. dynamic power dissipation p d p d can be calculated from the formulas shown; v ee = v ss =0 v; t r = t f 20 ns; t amb = 25 c. symbol parameter v dd typical formula for p d ( w) where: p d dynamic power dissipation 5v p d = 1300 f i + (f o c l ) v dd 2 f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v dd = supply voltage in v; (f o c l ) = sum of the outputs. 10 v p d = 6100 f i + (f o c l ) v dd 2 15 v p d = 15600 f i + (f o c l ) v dd 2
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 11 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 11.2 transfer characteristics table 12. control input characteristics v ss = v ee = 0 v unless otherwise specified. symbol parameter conditions t amb = 25 c t amb = ? 40 c to +85 c unit min max min max v t+ positive-going threshold voltage v dd = 5 v - 2.90 - 3.00 v v dd = 10 v - 4.37 - 4.50 v v t ? negative-going threshold voltage v dd = 5 v 1.03 - 1.00 - v v dd = 10 v 2.10 - 2.00 - v v h hysteresis voltage v dd = 5 v 0.16 - 0.10 - v v dd = 10 v 0.11 - 0.10 - v
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 12 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 12. package outline fig 11. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale s o16: plastic small outline package; 16 leads; body width 3.9 mm sot109 -1
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 13 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 13. revision history table 13. revision history document id release date data sheet status change notice supersedes HEF4952B_3 20091216 product data sheet - HEF4952B_2 modifications: ? title changed from 8-channel analog multiplexer/demultiplexer. ? section 1 ? general description ? modified. ? section 8 ? limiting values ? i ik conditions updated. ? abbreviations section removed. HEF4952B_2 20091002 product data sheet - HEF4952B_1 HEF4952B_1 20060320 product data sheet - -
HEF4952B_3 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 03 ? 16 december 2009 14 of 15 nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer 14. legal information 14.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 14.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 14.3 disclaimers general ? information in this document is believed to be accurate and reliable. however, nxp semiconductors d oes not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale ? nxp semiconductors products are sold subject to the general terms and condit ions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writ ing by nxp semiconductors. in case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 14.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 15. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
nxp semiconductors HEF4952B dual 3-channel analog multiplexer/demultiplexer ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 16 december 2009 document identifier: HEF4952B_3 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 16. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 recommended operating conditions. . . . . . . . 6 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.2.1 on resistance waveform and test circuit. . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11.1 waveforms and test circuit . . . . . . . . . . . . . . . . 9 11.2 transfer characteristics . . . . . . . . . . . . . . . . . 11 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 14 legal information. . . . . . . . . . . . . . . . . . . . . . . 14 14.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 14.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 15 contact information. . . . . . . . . . . . . . . . . . . . . 14 16 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15


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